The feasibility of miniaturized vision systems

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Overview:

C

ompact vision systems capable of capturing images at high speed and interpreting them to give users high-level information on the scene are increasingly becoming available to serve a range of real-time applications.

This White Paper discusses the reality of miniaturised vision systems-on-chip, the challenges which face their design, and their feasibility using modern and perhaps future technologies.
Smart cameras are implementations of distributed computer architectures based on the principle that digital data processing is less costly than data transmission and therefore information should be converted to digital format and processed digitally as close as possible to the sensor. As technology progresses, the compactness of vision systems increases.

Several independent advances in microelectronics, packaging and optics have contributed
to the possibility of implementing complete digital vision systems on a single chip [1]. These include the very fast evolution of microelectronic components, brought about by better silicon fabrication processes, advances in digital design techniques, mixed analogue and digital design on the same silicon microchip, and the integration of optical sensors with other circuit elements in the widely available CMOS technology [2]. Powerful processing architectures
can be embedded monolithically with the imager at a relatively low marginal cost [3]. Computer vision techniques have been improved for a number of years to yield efficient filtering, recognition and classification algorithms, while electrical interfaces and protocols have been defined for the convenient exchange of data.

This paper discusses the feasibility and challenges facing the design of single-chip vision systems, using examples of existing architectures and future proposals.