FPGAs Outpace ASICs

Machine builders often need to add custom, high-performance functionality to their automation systems because off-the-shelf controllers and I/O can’t meet their requirements. This customization must be implemented primarily in hardware rather than software to gain the needed high-speed functionality.

One option is a custom board built around a high-performance microprocessor. A second option is an Application Specific Integrated Circuit (ASIC) chip or chip set. A third option is a Field Programmable Gate Array (FPGA) chip or chip set.

A decade ago, custom boards carried much higher unit costs than ASICs, but the non-recurring engineering (NRE) costs were much lower. Many lines of code would have been needed to program the needed functionality into the custom board’s microprocessor.

If the application was really high-volume—say more than 100,000 units per year—the ASIC solution might have been employed. The lower unit cost of the ASIC compared to the custom board would have allowed the machine builder to recover the high NRE costs of the ASIC solution.

FPGAs really weren’t viable for any but the simplest applications, until recently. As I wrote in a 2004 TechFlash column [“Signal Processing at Warp Speed,” “FPGAs have been around for decades, but their use has been limited largely to niche applications such as prototyping and emulation systems.”

That was then. The ASIC-versus-FPGA landscape has changed dramatically. ASIC design starts peaked at 11,000 in 1997 and dropped to 2,000 in 2004 and 1,800 in 2007. FPGAs were just getting off the ground in 1997, but have since increased to 86,000 in 2006, with projected growth to 112,000 in 2010.

Why the change? In that 2004 article, I said, “In the past four years, FPGA technology has improved significantly, and this is increasing their popularity and changing the way FPGAs are applied.”

This is even truer today. FPGA technology continues to improve with more gates per chip, lower costs, and easier programming methods. The two undisputed market leaders in the FPGA market are Altera and Xilinx, and many companies in the automation industry already use their FPGA hardware and programming software.

We wrote about one such company in 2004. “We’re developing a new stepper-motor controller that duplicates the functions of a CPU, a floating-point processor, dedicated counting hardware, and a dedicated pulse output hardware on one FPGA,” said Robert Oglesby, president of Host Engineering, a technology provider to AutomationDirect. “A bigger and faster CPU could accomplish the same thing, but at a price, power, and size premium.”

We recently interviewed Oglesby again and found Host’s use of FPGAs continues apace. “The arrival of low-cost FPGAs dramatically leveled the playing field in favor of companies like ours,” he says. “It brought ASIC-like functionality and performance to a price level we can manage easily.”

We talked earlier about the high NRE costs associated with ASICs, and Oglesby responds, “Big companies can afford to spend six or seven figures making ASICs, but small companies can’t.”

Host Engineering and other firms like it have small volumes, and machine builders large and small also have comparatively small volumes. This means that FPGAs will beat ASICs hands-down for most every machine-builder application due to their much lower NRE costs.

Host provided a chronology of how FPGAs have improved over the past few years to make implementation easier for low-volume applications. “For us there were two key elements, and they arrived simultaneously in 2003,” says Oglesby. “One was the availability of a high-performance, vendor-supplied, soft processor, Altera NIOS. The other was the availability of Altera Cyclone 1C6, a sub-$15 solution that allows integration of the processor, an Ethernet port, and a backplane interface.”

Since then, Host moved to the NIOS 2 in 2005, and is moving toward the soon-to-be-released Altera Cyclone III.

Automation product vendors use FPGAs, but how about machine builders and the firms that directly service them? Acceptance by this group has been limited by the relative complexity of FPGA implementation.

As Oglesby recounted, even a hardware design firm like his found it difficult to use FPGAs prior to 2003 because of a lack of easy-to-use software tools. It was that much more difficult for machine builders and other non-specialists.

“The hardware-like nature of FPGA processors makes them difficult for typical software developers to efficiently use, especially in one-off or custom applications,” says Brian Tithecott, director of sales and marketing at SBS Canada in Waterloo, Ontario.

To address the machine builder FPGA market, National Instruments did two things, as we reported in 2004. First, it provideded a graphical FPGA programming language, and, second, it embedded FPGAs in its off-the-shelf I/O modules.

NI’s compact reconfigurable I/O (CompactRIO) system lets machine builders program FPGAs with the high-level graphical programming language supplied with LabView software. Machine builders familiar with HMI configuration can learn to implement LabView FPGA solutions quickly.

What sorts of machine builder apps are best suited to FPGAs? “Just like ASICs, FPGAs are good at doing specific things very quickly, such as in-parallel processing,” says Tithecott. “Unlike ASICs, FPGAS have that benefit of software-loadable flexibility.”